1. Field of the Invention
This invention relates to integrated circuits (ICs), and more particularly, to vias used to facilitate connections between circuits in an IC.
2. Description of the Related Art
Modern very large scale integrated (VLSI) circuits often times include on-chip networks with large and complex wiring systems. For example, many modern processor include a multiple processor cores, multiple caches, various interface units, and so on. Such processors may implement an on-die network to enable these various agents to communicate with one another. In some cases, the on-die network may implement one or more crossbar circuits to connect various agents to each other. Crossbar circuits may implement a large number of switchable connections. These connections may be concentrated in a small area of the IC. Furthermore, the connections may traverse multiple dimensions. For example, the connections may traverse both x and y axes in direction, but may also traverse a z-axis through the metal layers, since some connections may be implemented on different metal layers than others. The connections traversing the z-axis may connect the transistors in the silicon layer to wires on the various metal layers.
Various techniques may be employed to handle the high number of connections that may be concentrated in small areas with crossbars and other types of circuitry in an IC having large, on-die networks. For example, in connecting a wire from an upper metal layer to a transistor in the silicon layer, a via may be implemented that traverses some (but not all) of the metal layers, with another horizontal signal connection, and another via that completes the connection to the silicon layer. Wires from upper metal layers may also include bends or other directional changes so that they can avoid other wires and other vias to make a connection with the silicon layer.